Formal Description Techniques and Protocol Specification, Testing and Verification: FORTE X / PSTV XVII 97 [Paperback]

FORTE/PSTV '97 addresses Formal Description Techniques (FDTs) applicable to Distributed Systems and Communication Protocols (such as Estelle, LOTOS, SDL, ASN.1, TTCN, Z, Automata, Process Algebra, Logic). The conference is a forum for presentation of the state-of-the-art in theory, application, tools and industrialization of FDTs, and provides an excellent orientation for newcomers.1 Specification-based testing of concurrent systems.- 2 Refusal testing for classes of transition systems with inputs and outputs.- 3 A framework for distributed object-oriented testing.- 4 Interoperability test suite derivation for symmetric communication protocols.- 5 A hierarchy of communication models for message sequence charts.- 6 Timing constraints in message sequence chart specifications.- 7 Consistent semantics for ODP information and computational models.- 8 Specifying the ODP trader: an introduction to E-LOTOS.- 9 A computer aided design of a secure registration protocol.- 10 Implementation of distributed systems described with LOTOS multi-rendezvous on bus topology networks.- 11 Disjunction of LOTOS specifications.- 12 A timed automaton model for ET-LOTOS verification.- 13 Automatic checking of aggregation abstractions through state enumeration.- 14 Concept of quantified abstract quotient automaton and its advantage.- 15 Validating protocol composition for progress by parallel step reachability analysis.- 16 An improved search strategy for Lossy channel systems.- 17 A weighted random walk approach for conformance testing of a system specified as communicating finite state machines.- 18 Friendly testing as a conformance relation.- 19 Generalized metric based test selection and coverage measure for communication protocols.- 20 Dynamic priorities for modeling real-time.- 21 On-line timed protocol trace analysis based on uncertain state descriptions.- 22 Algebraic specification through expression transformation.- 23 Modelling digital logic in SDL.- 24 A methodology for the delãE