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Analysis of Cache Performance for Operating Systems and Multiprogramming [Hardcover]

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  • Category: Books (Computers)
  • Author:  Agarwal
  • Author:  Agarwal
  • ISBN-10:  0792390059
  • ISBN-10:  0792390059
  • ISBN-13:  9780792390053
  • ISBN-13:  9780792390053
  • Publisher:  Springer
  • Publisher:  Springer
  • Binding:  Hardcover
  • Binding:  Hardcover
  • Pub Date:  01-Feb-1989
  • Pub Date:  01-Feb-1989
  • SKU:  0792390059-11-SPRI
  • SKU:  0792390059-11-SPRI
  • Pages:  190
  • Pages:  190
  • Item ID: 100717201
  • List Price: $109.99
  • Seller: ShopSpell
  • Ships in: 5 business days
  • Transit time: Up to 5 business days
  • Delivery by: Oct 05 to Oct 07
  • Notes: Brand New Item. Not shipped to AK, HI, APO, FPO, AE.
As we continue to build faster and fast. er computers, their performance is be? coming increasingly dependent on the memory hierarchy. Both the clock speed of the machine and its throughput per clock depend heavily on the memory hierarchy. The time to complet. e a cache acce88 is oft. en the factor that det. er? mines the cycle time. The effectiveness of the hierarchy in keeping the average cost of a reference down has a major impact on how close the sustained per? formance is to the peak performance. Small changes in the performance of the memory hierarchy cause large changes in overall system performance. The strong growth of ruse machines, whose performance is more tightly coupled to the memory hierarchy, has created increasing demand for high performance memory systems. This trend is likely to accelerate: the improvements in main memory performance will be small compared to the improvements in processor performance. This difference will lead to an increasing gap between prOCe880r cycle time and main memory acce. time. This gap must be closed by improving the memory hierarchy. Computer architects have attacked this gap by designing machines with cache sizes an order of magnitude larger than those appearing five years ago. Microproce880r-based RISe systems now have caches that rival the size of those in mainframes and supercomputers.1 Introduction.- 1.1 Overview of Cache Design.- 1.2 Review of Past Work.- 1.3 Then, Why This Research?.- 1.4 Contributions.- 1.5 Organization.- 2 Obtaining Accurate Trace Data.- 2.1 Current Tracing Techniques.- 2.2 Tracing Using Microcode.- 2.3 An Experimental Implementation.- 2.4 Trace Description.- 2.5 Applications in Performance Evaluation.- 2.6 Extensions and Summary.- 3 Cache Analyses Techniques  An Analytical Cache Model.- 3.1 Motivation and Overview.- 3.2 A Basic Cache Model.- 3.3 A Comprehensive Cache Model.- 3.4 Model Validation and Applications.- 3.5 Summary.- 4 Transient Cache Analysis  Trace Sampling and Trace Stitching.-lăZ
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