This book explores and motivates the need for building homogeneous and heterogeneous multi-core systems for machine learning to enable flexibility and energy-efficiency. Coverage focuses on a key aspect of the challenges of (extreme-)edge-computing, i.e., design of energy-efficient and flexible hardware architectures, and hardware-software co-optimization strategies to enable early design space exploration of hardware architectures. The authors investigate possible design solutions for building single-core specialized hardware accelerators for machine learning and motivates the need for building homogeneous and heterogeneous multi-core systems to enable flexibility and energy-efficiency. The advantages of scaling to heterogeneous multi-core systems are shown through the implementation of multiple test chips and architectural optimizations.
Chapter 1: Introduction.- Chapter 2 Algorithmic Background for Machine Learning.- Chapter 3 Scoping the Landscape of (Extreme) Edge Machine Learning Processors.- Chapter 4 Hardware-Software Co-optimization through Design Space Exploration.- Chapter 5 Energy Efficient Single-core Hardware Acceleration.- Chapter 6 TinyVers: A Tiny Versatile All-Digital Heterogeneous Multi-core System-on-Chip.- Chapter 7 DIANA: Digital and ANAlog Heterogeneous Multi-core System-on-Chip.- Chapter 8 Networks-on-chip to Enable Large-scale Multi-core ML Acceleration.- Chapter 9 Conclusion.
Vikram Jain received his M.Sc degree in Embedded Electronics Systems Design (EESD) from Chalmers University of Technology, Sweden, in 2018, and his PhD degree in Electrical Engineering from KU Leuven, Belgium, in 2023. His PhD research was in implementation of energy efficient digital acceleration and RISC-V processors for machine learning applications l!