This book provides a single-source reference to the state-of-the-art in logic synthesis. Readers will benefit from the authors expert perspectives on new technologies and logic synthesis, new data structures, big data and logic synthesis, and convergent logic synthesis. The authors describe techniques that will enable readers to take advantage of recent advances in big data techniques and frameworks in order to have better logic synthesis algorithms.
1. EDA3.0: Implications to Logic Synthesis
2. Can parallel programming revolutionize EDA tools?
3. Emerging Circuit Technologies: An Overview on the Next Generation of Circuits
4. Physical Awareness starting at Technology-Independent Logic Synthesis
5. Identifying Transparent Logic in Gate-Level Circuits
6. Automated Pipeline Transformations with Fluid Pipelines
7. Analysis of Incomplete Circuits using Dependency Quantied Boolean Formulas
8. Progressive Generation of Canonical Irredundant Sums of Products Using a SAT Solver
9. A Branch-and-Bound-Based Minterm Assignment Algorithm for Synthesizing Stochastic Circuit
10. Decomposition of Index Generation Functions Using a Monte Carlo Method
Andr? In?cio Reis?is a Professor at the Institute of Informatics, UFRGS, Brazil, since 2000. He is a senior member of IEEE and ACM, and co-authored more than 200 academic papers and 10 granted USA patents. He received best paper awards from IFIP VLSI 1997, SBCCI 2013 and IWLS 2015. Prof. Andre Reis is actively involved with the organization of ACM/IEEE IWLS. Andre Reis is an advisor for Nangate Inc since 2005, and coordinated cooperation directly between UFRGS and Nangate, as well as among Nangate, UFRGS and six other partners during the European FP7 project Synaptic. The plS&
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