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Asynchronous Circuits [Paperback]

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  • Category: Books (Computers)
  • Author:  Brzozowski, Janusz A., Seger, Carl-Johan H.
  • Author:  Brzozowski, Janusz A., Seger, Carl-Johan H.
  • ISBN-10:  1461286980
  • ISBN-10:  1461286980
  • ISBN-13:  9781461286981
  • ISBN-13:  9781461286981
  • Publisher:  Springer
  • Publisher:  Springer
  • Binding:  Paperback
  • Binding:  Paperback
  • Pub Date:  01-Feb-2011
  • Pub Date:  01-Feb-2011
  • SKU:  1461286980-11-SPRI
  • SKU:  1461286980-11-SPRI
  • Item ID: 100722367
  • List Price: $169.99
  • Seller: ShopSpell
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  • Delivery by: Jul 03 to Jul 05
  • Notes: Brand New Book. Order Now.

In recent years, there has been a great surge of interest in asynchronous circuits, largely through the development of new asynchronous design methodologies. This book provides a comprehensive theory of asynchronous circuits, including modelling, analysis, simulation, specification, verification, and an introduction to their design.

Although asynchronous circuits date back to the early 1950s most of the digital circuits in use today are synchronous because, traditionally, asynchronous circuits have been viewed as difficult to understand and design. In recent years, however, there has been a great surge of interest in asynchronous circuits, largely through the development of new asynchronous design methodologies.
This book provides a comprehensive theory of asynchronous circuits, including modelling, analysis, simulation, specification, verification, and an introduction to their design. It is based on courses given to graduate students and will be suitable for computer scientists and engineers involved in the research and development of asynchronous designs.1 Introductory Examples.- 1.1 Logic Gates.- 1.2 Performance Estimation.- 1.3 RS Flip-Flop.- 1.4 Dynamic CMOS Logic.- 1.5 Divide-by-2 Counter.- 1.6 Summary.- 2 Mathematical Background.- 2.1 Sets and Relations.- 2.2 Boolean Algebra.- 2.3 Ternary Algebra.- 2.4 Directed Graphs.- 3 Delay Models.- 3.1 Environment Modes.- 3.2 Gates with Delays.- 3.3 Ideal Delays.- 3.4 Inertial Delays.- 4 Gate Circuits.- 4.1 Properties of Gates.- 4.2 Classes of Gate Circuits.- 4.3 The Circuit Graph.- 4.4 Network Models.- 4.5 Models of More Complex Gates.- 5 CMOS Transistor Circuits.- 5.1 CMOS Cells.- 5.2 Combinational CMOS Circuits.- 5.3 General CMOS Circuits.- 5.4 Node Excitation Functions.- 5.5 Path Strength Models.- 5.6 Capacitance Effects.- 5.7 Network Model of CMOS Circuits.- 6 Up-Bounded-Delay Race Models.- 6.1 The General Multiple-Winner Model.- 6.2 GMW Analysis and UIN Delays.- 6.3 The Outcome in GMW AlÅ
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