Efficient Test Methodologies for High-Speed Serial Links [Paperback]

Efficient Test Methodologies for High-Speed Serial Links describes in detail several new and promising techniques for cost-effectively testing high-speed interfaces with a high test coverage. One primary focus of Efficient Test Methodologies for High-Speed Serial Links is on efficient testing methods for jitter and bit-error-rate (BER), which are widely used for quantifying the quality of a communication system. Various analysis as well as experimental results are presented to demonstrate the validity of the presented techniques.

Covering new and promising techniques for cost-effectively testing high-speed interfaces with high test coverage, the authors focus on efficient test methodologies for jitter and bit-error-rate, widely used for assessing the quality of communication systems.

Efficient Test Methodologies for High-Speed Serial Links describes in detail several new and promising techniques for cost-effectively testing high-speed interfaces with a high test coverage. One primary focus of Efficient Test Methodologies for High-Speed Serial Links is on efficient testing methods for jitter and bit-error-rate (BER), which are widely used for quantifying the quality of a communication system. Various analysis as well as experimental results are presented to demonstrate the validity of the presented techniques.

Chapter 1 Intorduction. 1 Overview of High-Speed Serial Links. 1.1 High-Speed Serial Link System. 1.2 Testing High-Speed Serial Links. 2 Challenges in Testing High-Speed Serial Links. 3 Contributions of the Dissertation. Chapter 2 An Efficient Jitter Measurement Technique. 1 Comparator Undersampling Technique. 2 Random Jitter Measurement. 2.1 Proposed RJ Measurement Technique. 2.2 Limitations of the Technique. 3 Experimental Results. 3.1 Simulation Results. 3.2 Measurement Results. 4 Summary. Chapter 3 BER Estimation for Linear Clock and Data Recovery Circuit. 1 BER Analysis with Random Jitter. 1.1 Error Occl³n