This book helps readers to implement their designs on Xilinx? FPGAs. The authors demonstrate how to get the greatest impact from using the Vivado? Design Suite, which delivers a SoC-strength, IP-centric and system-centric, next generation development environment that has been built from the ground up to address the productivity bottlenecks in system-level integration and implementation. This book is a hands-on guide for both users who are new to FPGA designs, as well as those currently using the legacy Xilinx tool set (ISE) but are now moving to Vivado. Throughout the presentation, the authors focus on key concepts, major mechanisms for design entry, and methods to realize the most efficient implementation of the target design, with the least number of iterations.
Chapter 1: State of the Art Programmable Logic 1
Chapter 2: Vivado Design Tools 17
Chapter 3: IP Flows 23
Chapter 4: Gigabit Transceivers 35
Chapter 5: Memory Controllers 49
Chapter 6: Processor Options 65
Chapter 7: Vivado IP Integrator 75
Chapter 8: SysGen for DSP 85
Chapter 9: Synthesis 97
Chapter 10: C Based Design 111
Chapter 11: Simulation 127
Chapter 12: Clocking 141
Chapter 13: Stacked Silicon Interconnect (SSI) 155
Chapter 14: Timing Closure 167
Chapter 15: Power Analysis and Optimization 179
Chapter 16: System Monitor 191
Chapter 17: Hardware Debug 205
Chapter 18: Emulation Using FPGAs 221
Chapter 19: Partial Reconfiguration & Hierl“&